Researchers at the International Quantum Academy in Shenzhen, China, and partner institutions reported on March 23, 2026, that they had run a universal set of logical gates on a silicon quantum processor. In a peer-reviewed paper in Nature Nanotechnology, they described encoding two logical qubits in the nuclear spins, or magnetic orientations, of four phosphorus atoms with an error-detecting code.
A logical qubit is one unit of quantum information spread across several physical qubits, so that a processor can detect or correct errors on individual qubits. A set of gates is universal if its operations can be combined to run any quantum algorithm. The authors cited earlier logical-qubit experiments on superconducting circuits, trapped ions, neutral atoms, and nitrogen-vacancy centers in diamond, and wrote in the abstract that logical operations had not yet been realized in silicon.
The authors reported that their logical gates averaged about 86% fidelity, against more than 95% for the same device’s physical gates. They attributed the gap to state-preparation errors that they did not subtract when characterizing the logical gates. Fidelity is a measure of how closely a quantum state or operation matches the intended one, where 100% means a perfect match.
The device
The team built the processor with scanning tunneling microscope lithography, a technique for placing phosphorus atoms in silicon with atomic precision. The researchers placed the atoms on a 20-nanometer layer of isotopically purified silicon-28 and covered them with more silicon. The lower layer contains less than 130 parts per million of silicon-29, an isotope with nuclear spins that add noise.
Phosphorus atoms in silicon are known as donors because each one can give up an electron. The processor is a cluster of five such donors whose nuclear spins serve as physical qubits and interact through an electron shared by the cluster. Four of the five spins encode the two logical qubits in a [[4, 2, 2]] code, with the fifth serving as an ancilla, a helper qubit for the T gate.
The code is named for its four physical qubits, two logical qubits, and code distance of 2. With a distance of 2, the code can flag an error on any one of its four qubits but cannot correct it, using parity checks that reveal whether an error occurred without reading out the stored information.
Error-correcting processors catch errors as they happen by measuring some qubits partway through a computation. The team could not take such mid-circuit measurements, the authors wrote. Instead, the researchers applied the checks afterward, in post-processing, to the states they reconstructed from their measurements, and discarded the errors the checks detected. This method is known as post-selection.
What the team measured
With the parity checks applied, the team measured 96.5% fidelity for a prepared logical state and 95.5% for a logical Bell state, the simplest form of entanglement between two qubits. Without the checks, the figures were 84.2% and 80.5%. The researchers reported acceptance ratios of 83.9% and 82.9%.
For a logical X gate, a logical CNOT gate, and a Hadamard gate applied to both logical qubits, the team reported fidelities of 88.3%, 88.6%, and 75.6%. The team based those three figures on how reliably each gate moved the qubits into the expected states. Using process tomography, a method for reconstructing a gate’s full action from many measurements, the researchers measured 87.0% for a logical S gate, 82.6% for a logical T gate, and 91.5% for its inverse, the T-dagger gate.
Circuits built only from Clifford gates, a group that includes X, CNOT, Hadamard, and S, can be simulated efficiently on a classical computer when the qubits start in standard basis states and are measured in standard bases. A processor needs a non-Clifford gate such as T to complete a universal set and to run calculations beyond classical reach.
The team used the T and T-dagger gates to prepare four magic states, which fault-tolerant machines consume as a resource to run T gates. The researchers measured 95.2% fidelity for one of the four, made with T-dagger, above the 92.7% threshold that the authors cited from a distillation protocol by Sergey Bravyi and Alexei Kitaev.
Above that threshold, noisy magic states can be distilled into cleaner ones. For the other three states, the team measured between 84.0% and 89.8%.
The researchers also ran a variational quantum eigensolver on the two logical qubits to estimate the ground-state, or lowest, energy of a water molecule, in a version of the problem reduced to fit two qubits. In that algorithm, quantum and classical processors share the work. On average, the team’s estimates differed from the theoretical values by 22.7 millihartree, a unit of energy used in quantum chemistry.
Error sources
The authors named residual cross-talk as the dominant error source in the gates. Cross-talk happens when a control signal meant for one qubit also affects another.
The authors wrote that cross-talk caused higher-weight errors beyond the detection capability of the [[4, 2, 2]] code. A higher-weight error affects several qubits at once.
Coherence time is how long a qubit keeps its quantum state. The authors reported an average logical coherence time of about 208 microseconds, against about 523 microseconds for the physical qubits they averaged. They wrote that the two logical qubits form “a four-qubit entangled state that is inherently more susceptible to decoherence.”
The team also measured a strong noise bias, in which phase-flip errors occurred more often than bit-flip errors. A bit flip swaps a qubit’s 0 and 1, while a phase flip changes the relative sign between the two in a superposition.
The authors wrote that biased noise “can be beneficial in improving the fault-tolerance threshold,” the physical error rate below which adding error correction lowers the error rate of logical qubits.
Next steps
The authors wrote that they would explore better donor engineering and improved control-pulse design to reduce cross-talk. They also wrote that arrays of donor clusters “will be fabricated to scale this system up” and to realize a fault-tolerant design. Seven of the paper’s authors described such an array in a preprint first posted in September 2025 that has not been peer reviewed.
