Researchers from Google Quantum AI, Google DeepMind, and MIT have proposed building quantum error correction from small, flat chip modules wired together at their edges. The 14 authors described the design in a preprint posted on October 2, 2026. They reported that in simulations it needed 10 times fewer physical qubits per logical qubit than a surface code split into modules of similar size.
In error correction, each logical qubit, the reliable unit that algorithms use, is encoded across many physical qubits so that errors can be caught and fixed. The preprint has not been peer reviewed. The authors have not tested the design on hardware or estimated the resources a complete quantum algorithm would need on it.
Oscar Higgott and Hasan Sayginel of Google Quantum AI are the corresponding authors. The co-authors include Craig Gidney, who wrote Google’s 2025 estimate of the resources needed to factor a 2048-bit RSA key.
Surface codes and higher-rate codes
In 2024, Google reported two surface-code memories that operated below the error-correction threshold on its Willow processors. Below that threshold, engineers can lower the logical error rate by making the code larger. The team ran the larger memory, at distance 7, on a chip with 105 physical qubits and used 101 of them to store one logical qubit.
Code distance is the smallest number of physical errors that can cause an undetected logical error. The surface code, the scheme Google ran on Willow, stores one logical qubit in each patch of physical qubits laid out on a square grid.
The authors put the cost of a surface code at more than 1,000 physical qubits per logical qubit at the distances of 20 to 24 they expect utility-scale machines to need. Codes with a higher encoding rate store many logical qubits in a single block.
How the modules connect
In the paper’s main examples, each module contains 42 to 116 physical qubits. Inside a module, every qubit couples to at most four nearest neighbors on a two-dimensional grid. Couplers along the module edges join the modules in the pattern of a closed hyperbolic surface, a negatively curved geometry on which a code can store more logical qubits as the surface grows.
The team built two families of codes on this layout, one based on surface codes and one on color codes, a related type of error-correcting code.
Simulation results
The team simulated stored logical qubits under SI1000, a noise model designed to resemble superconducting hardware. The researchers set the physical error rate at 0.1% and gave every two-qubit gate between modules an error rate of 1%, 10 times the rate inside modules.
One modular hyperbolic surface code, spread over 120 modules of 116 physical qubits each, stored 146 logical qubits in 13,920 physical qubits. To reach a logical error rate of 1 in 10 billion per round, the authors reported, that code needed 10 times fewer physical qubits per logical qubit than the modular surface code.
For color codes decoded with a variant of DeepMind’s AlphaQubit neural-network decoder, the authors reported an eightfold gain in density over a similarly modular surface code. A decoder is the classical software that reads error-correction measurements and works out which errors occurred.
In a separate sweep, the authors raised the error rate of gates between modules from 0.1%, the rate inside modules, to as much as 2%. They wrote that their circuits are “highly tolerant to noisy inter-module gates,” with link errors 10 times the in-module rate “leading to only a modest increase in logical error rate.”
Projections and logical operations
Extrapolating to codes too large for them to simulate or decode, the authors projected a 15-fold saving for the hyperbolic surface codes and more than 30-fold for the color codes. In that projection, the color codes would need 36 physical qubits per logical qubit at distances of 20 to 24.
The authors wrote that these projected codes would exceed both the rate and the distance of IBM’s two-gross code. IBM’s code stores 12 logical qubits and uses 48 physical qubits per logical qubit, including qubits used for error checks.
To compute with stored qubits, the authors attached a “ribbon extractor,” a strip of modules that makes measurements on stored logical qubits along one closed loop of the code. For two codes that each store 104 logical qubits, at distances 22 and 30, the authors estimated that the extractor adds roughly 22% to the physical qubits in the memory, a bound they described as overly cautious.
The researchers used symmetries of the hyperbolic layout to move other logical qubits under the extractor, reaching 100 of the 104 logical qubits in at most six moves. As a benchmark, they compiled a 50-bit ripple-carry adder, a basic circuit for adding two numbers, onto the distance-22 code. Under assumed costs per operation, they bounded the extractor and symmetry work at 21,402 error-correction cycles, or 428 per bit.
The authors wrote that such logical operations “should be co-designed with compilations of full quantum algorithms.”
Decoding and hardware
The researchers trained a separate copy of the AlphaQubit variant for each circuit on up to 3 billion simulated examples. On a single Google TPU v6e, a machine-learning chip, the decoder took 140 microseconds to 6 milliseconds to process each 16-round sample, depending on circuit size.
The authors wrote that “real-time decoding at scale will require parallelization or specialized hardware implementations.” They wrote that a hardware version “will require a fully integrated system that simultaneously operates high-performance local grids of qubits” and that such systems must be resilient to fabrication defects.
