Qarakal Quantum, a Tel Aviv superconducting quantum computing company, said in a release on August 5, 2026, that its Pangaea architecture maintains fault tolerance with “1/10th of the required qubit count of traditional approaches.” The company’s researchers described the design in a preprint posted on August 3 and revised on August 6.
In the preprint, the authors counted the physical qubits for a single merge operation, a joint measurement of two error-corrected logical qubits, in a system of 50 logical qubits. They obtained the tenfold ratio at a code distance of 13, a measure of how many errors a code can correct, by extending a fit to simulations that stopped at distance 7. The points at distance 9 and above “should be read as order-of-magnitude estimates, not as simulated results,” they wrote.
Qarakal’s tenfold ratio is an extrapolated estimate for a single merge operation, in a preprint that has not been peer reviewed. The company’s release did not mention the single merge, the 50-logical-qubit scale, or the extrapolation.
How the quantum bus works
A fault-tolerant quantum computer encodes each logical qubit, the unit an algorithm works with, in a patch of physical qubits that is checked repeatedly for errors. A patch with a larger code distance, d, can correct more errors and uses on the order of d² physical qubits.
In planar designs, engineers connect patches through lattice surgery, in which patches merge and split along their boundaries to measure joint properties. The authors wrote that a conventional two-dimensional layout requires “a dedicated ancilla region” of helper qubits, sized in proportion to d² times the number of logical qubits.
In Pangaea, the authors replaced that region with a quantum bus, an auxiliary strip d qubits wide and ℓ rows long, with slots that each accept one code patch. They wrote that joint operations between patches that are not next to each other are reconstructed from measurements on the bus. Each physical qubit still connects only to its nearest neighbors.
The bus’s qubit count grows in proportion to d times the number of logical qubits. In a full layout, two buses are stacked at right angles in a three-dimensional tower.
By the authors’ formula, one bus serving 50 logical qubits would have 49 rows. They simulated buses of 1, 3, 5, and 7 rows, plus 9 rows in one additional test at distance 3. The preprint does not state the bus length behind Figure 7, and the authors’ fitted error model has no term for it.
How the authors reached the tenfold figure
In Figure 7, the authors compared the total physical qubits for a single merge at the 50-logical-qubit scale, across code distances. For the planar baseline, they counted the ancilla region and the two logical patches being merged. The patches for the other 48 logical qubits are not part of that count.
The authors fitted their simulation results at distances 3, 5, and 7 and extended the fit by log-linear extrapolation. At a physical error rate of 1 in 1,000, they marked ratios of 3.5, 7.4, and 10.1 times fewer qubits for Pangaea at logical error rates of 1 in 10,000, 1 in 100 million, and 1 in a trillion. The logical error rate is how often the encoded operation fails.
What the authors simulated
The authors ran their simulations in Stim, a circuit simulator, with a simplified noise model that adds random errors before each round of checks and flips some measurement results. They treated resets and the final readout as error-free.
A decoder is software that infers from check results which errors occurred. For buses joining two surface-code patches, decoded with minimum-weight perfect matching, the authors reported pseudo-thresholds of 0.43%, 1.13%, and 1.27% at distances 3, 5, and 7. A pseudo-threshold is the physical error rate below which, at a given distance, the encoded operation fails less often than a bare physical one.
For buses joining a surface-code patch with one built on a color code, a different error-correcting code, the authors used belief propagation with ordered-statistics decoding and reported 0.36%, 1.13%, and 1.25%. They did not report decoder speed.
Distillation module
The authors also designed a 15-to-1 magic-state distillation module on a shared bus. In magic-state distillation, a machine converts 15 noisy copies of a resource state into one cleaner copy. Fault-tolerant computers consume such states to run most useful algorithms.
The authors calculated the module’s space-time volume, its area in tiles multiplied by its logical time steps, at 66. For the standard surface-code distillation factory that Daniel Litinski described in a paper published in 2019, they gave 121.
The authors reported no simulated error rate for the module’s output and no acceptance rate, the share of distillation attempts that succeed.
Hardware and company
The authors wrote that “realizing repeated vertical bus slots will require overcoming significant engineering challenges in practice.” They named flip-chip integration, through-silicon vias, and chip-to-chip couplers among candidate implementations. Demonstrations of the bus in superconducting hardware are future work, they wrote, and they gave no date.
In the release, Qarakal said Pangaea requires “up to an order of magnitude less infrastructure,” with “reduced wiring and control complexity” and lower energy consumption. The authors did not estimate wiring, control electronics, or energy use in the preprint. “Reaching the same fault-tolerant capability with one-tenth the physical qubits changes what is possible right now,” Nissan Maskil, Qarakal’s chief executive and a co-founder, said in the release.
Qarakal’s website lists Maskil and Nadav Katz as founders. Katz, a physics professor at the Hebrew University of Jerusalem, is the company’s chief technology officer and an author of the preprint. Startup Nation Central, an Israeli nonprofit, lists Qarakal as founded in September 2024 by Katz and Alfred Zimmt, with an Israel Innovation Authority grant in January 2025.
Update, November 12, 2026: The preprint has had no revision since August 6, and Qarakal has not reported a Pangaea chip or hardware demonstration.
